1. Field of the Disclosure
The present disclosure relates generally to a method and apparatus for controlling battery charging capable of reducing a charging time, and more particularly, to an apparatus for and a method of decreasing a charging time of a battery by compensating for an equivalence serial resistor (ESR) of a charging path and a battery at a charging voltage to avoid an increase in charging current.
2. Description of the Related Art
Charging time and usage time are emerging issues from a perspective of power of an embedded system including a battery. Usage time indicates a time during which a system may be used while powered only by the battery after the battery has been charged. In general, users want a short charging time and a long usage time. One method of decreasing the charging time is to use a high charging current. However, this method rapidly decreases the lifespan of a battery.
FIG. 1 is a block diagram of a system for charging a battery of an electronic device according to a conventional method.
Referring to FIG. 1, the battery charging method of the conventional technique uses a principle in which a device identifier (ID) of a battery unit 13 is confirmed in a controller unit 11, and a charging voltage (V_SET) and charging current (I_SET) are set by using a charger unit 12 to charge the battery unit 13. The controller unit 11 decides information regarding voltage, current, a failure status, a residual amount, or the like of the battery 13 to determine whether to perform charging.
After setting the charging voltage and current, the battery unit 13 is charged. FIG. 2 is a voltage/current graph for the charging method of FIG. 1. Referring to FIG. 2, a charging current is applied according to the I_SET if a charging amount is small, where this region is referred to as a constant current (CC) region. Thereafter, a region in which the current decreases as the battery voltage increases to converge to V_SET while charging current is accumulated is referred to as a constant voltage (CV) region. Thereafter, a full charge bit for reporting a full charging completion is set in an internal register of the battery unit 13, and the controller unit 11 reads this bit to stop the charging.
FIG. 3 is a block diagram of the charger unit 12 of FIG. 1.
Referring to FIG. 3, in theory, an output-node voltage (V_CHG) of the charger unit 12 must be fully applied to the battery unit 13. However, in practice, a voltage drop occurs due to an ESR inside or between the charger unit 12 and the battery unit 13, that is, an internal resistance of a connector, a field effect transistor (FET) transistor, a routing, or the like. For this reason, the full V_CHG cannot be applied to the battery unit 13, and thus the charging voltage decreases. Since the charging voltage decreases, charging time increases.
Accordingly, there is a need for a method of compensating for a voltage drop caused by the ESR and decreasing a battery charging time.